Recently, the Chinese Academy of Sciences Institute of Microelectronics integrated circuit pilot technology research and development center in the next generation of new FinFET logic device technology research has made important progress. (MSD) on the novel FOIFinFET utilizes low temperature and low resistance NiPt silicide to significantly reduce the source and drain parasitic resistance, resulting in an improvement of about 30 times the performance of the N / PMOS device, resulting in a Drive performance reached the international advanced level. The paper based on the results of this study was received by the IEEE International Conference on Electronic Devices (IEDM) in 2016 and presented by Microelectronics Zhang Qingzhu, one of the key subcommittees of IEDM - Silicon-based Pilot CMOS Technology and Manufacturing Technology (PMT) Made academic reports, and by IBM and STMicroelectronics technical experts praise and recognition.

In the process behind the international manufacturers

       All along, the wafer foundry in China is technically lagging behind Intel, TSMC, Grolord, Samsung and other international manufacturers, in addition to limited by the Wassenaar contract can not be purchased from the West to the most advanced semiconductor equipment, In the process behind the West is also very important reason. How important is the process? On the 28nmpoly / SiON, 28nmHKMG and 28nmSOI, although the same process for the 28nm, but due to the differences between the specific process, resulting in the use of different processes of the chip will be different in performance.

Taking into account if the STMicroelectronics 28nmSOI and SMIC 28nmHKMG contrast may have different fabs brought variables, then with the use of TSMC 28nmLP process, 28nmHPC / HPC + process, 28nmHPM process to compare the chip, 28nmLP process chip is clearly inferior performance, which is also the use of 28nmLP process of high-pass Xiao Long 615 in performance and power control on the use of 28nmHPM process MediaTek 6752 and 28nmHPC process using one of the reasons for the unicorn 930.

       In the process, the domestic wafer foundry is also lagging behind Intel, TSMC, Ge Luo Fang De, Samsung and other international manufacturers. For example, a self-CPU company uses a 40nmLL process in a domestic foundry, and then due to limited process performance, the domestic foundry 40nmLL process than the Italian semiconductor 65nmGP process is also slow 30% ... ...

Another example is a joint venture CPU company to undertake the nuclear high base special, due to the requirements of the nuclear high base must use the domestic process, but in the use of domestic 28nm manufacturing process, the CPU frequency is not even 1GHz, then go TSMC current film, although the same 28nm process, but TSMC will be able to do more than 1.2GHz frequency, pick a pick quality is good, the highest frequency can go to 2GHz ... ...

       In addition, in addition to long-term process in the international manufacturers, the domestic fab process is mostly technology introduction, rather than independent research and development, this area to pay a lot of money, also had to sign a basket of various restrictions Sexual terms, which will bring a lot of consequences. To develop the superior performance of the EDA tool, it is inseparable from the combination of advanced technology, domestic independent process rarely deep sub-micron process, mostly 180nm and 130nm. Although SMIC has 40nm, and claims to have 28nm, but may not have mass production, or mass production are small chips. And the introduction of the process have signed an agreement, which on the domestic EDA's technological progress and development caused obstacles.

Therefore, the independent research and development of the technology is precious. Prior to this, the domestic also proposed S-FinFET, rear gate nanowires and silicon insulation Fin-on-insulatorFinFET and other innovative technologies, but mostly inferior to the mainstream FinFET process. And this microelectronics to achieve the new technology, the performance reached the international advanced level.

       FinFET and Hu Zhengming

       Before introducing the new process developed by Microelectronics, the FinFET and FD-SOI processes are introduced first.

FinFET Fin refers to the fin type, FET refers to the field effect transistor, together is the fin field effect transistor. The MOSFET has been used before the FinFET comes out, but because the gate length is less than 20nm, the source and drain are too close and the oxide is thinner, which is likely to cause leakage. In some cases the industry believes that the manufacturing process will stop, Moore's Law is about to fail, a Chinese scientist and his colleagues invented the two technologies so that the manufacturing process to continue to 20nm below.

       Professor Hu Zhengming was born in the United States in July 1947 in Beijing, China, in 1973 by the University of California at Berkeley Ph.D., in 1997 was elected to the American Academy of Engineering Academy. In 2007, he was elected a foreign academician of the Chinese Academy of Sciences. More than a decade ago, under the auspices of the US Department of Defense's Advanced Research Projects Agency, Professor Hu Zhengming studied how to extend CMOS technology to the 25nm field at the University of California. Professor Hu Zhengming and his colleagues in the study results are either using FinFET, or take the SOI-based ultra-thin insulation layer on the silicon technology.

       In 1999 and 2000, Prof. Hu and his team published papers on FinFET and UTB-SOI (FD-SOI), because Professor Hu Zhengming and his team thought that few manufacturers could make the SOI matrix 5nm, or FinFET technology may have been fully developed when people have this technical capability, so a large number of vendors, including Intel and TSMC, have chosen FinFET. With the contribution of technological innovations such as FinFET, in 2000, Professor Hu Zhengming received the Outstanding Technology Achievement Award from the US Department of Defense's Advanced Research Projects Agency. In 2015, Professor Hu Zhengming also won the US National Technology and Innovation Award.

       According to Professor Hu Zhengming's introduction, FinFET achieved two breakthroughs, one is to thin the crystal and solve the leakage problem, the second is upward development, wafer structure from the horizontal into vertical, that is, the 2D MOSFET into 3D FinFET. And what is the effect of this practice? TSMC has said: 16nmFinFET process can significantly improve the chip performance, power consumption, and reduce leakage rate, the gate density is TSMC 28nmHPM twice the process, the same power consumption can accelerate the speed of more than 40%, the same frequency power consumption can Reduced by more than 60%.

       It is worth mentioning that, by Samsung's front desk builder Liang Mengsong doctoral thesis professor is Hu Zhengming, presumably this is Samsung to 14nmFinFET to achieve one of the reasons for the Great Leap Forward it